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Elulookirjeldus (CV)
1.Eesnimi Jelena
2.Perekonnanimi Fomina
3.Töökoht Tallinna Tehnikaülikool (TTÜ)
4.Ametikoht Teadur
5.Sünniaeg 07.04.1974 (päev.kuu.aasta)
6.Haridus 1999- TTÜ, doktorant
1196-1999 TTÜ, tehnikamagister
1991-1996 TTÜ, insener
7.Teenistuskäik 2005- teadur
8.Teaduskraad tehnikamagister
9.Teaduskraadi välja
andnud asutus, aasta		 TTÜ, 1999
10.Tunnustused
11.Teadusorganisatsiooniline
ja –administratiivne
tegevus
12.Juhendamisel kaitstud
väitekirjad
13.Teadustöö põhisuunad Digitaalskeemide süntees, lõplike automaatide dekompositsioon ja kodeerimine, tükelduste entroopsed keerukushinnangud, automaatide võrgu tagasiside kvantitatiivne hindamine, automaatide madala energiatarbega realisatsioonid.
14.Jooksvad grandid Eesti teadusfond, Grand 5643
15.Teaduspublikatsioonid

E. Fomina, R. Vassilyev and M.Brik, “New Approach to State Encoding of Low Power FSM”, in Proc. of the East West Design Test Workshop (IEEE EWDTW’05), Odessa, Ukraine, 2005, pp 21-26 (ISBN 966-659-113-8)

M. Brik, E. Fomina and R. Ubar, “A Proposal for Optimization of Low-Powered FSM Testing”, in Proc. of the East West Design Test Workshop (IEEE EWDTW’05), Odessa, Ukraine, 2005, pp 15-20, (ISBN 966-659-113-8).

A decomposition procedure for register-transfer level power management. Fomina, E.; Keevallik, A.; Kruus, M.; Sudnitson, A.; In: Proceedings of the International Conference on Computer Systems and Technologies (e-Learning). Sofia, Bulgaria: Bulgarian Acad. Sci, 2003. p. I.2-1-6.

Web-based system for sequential machines decomposition. Devadze, S.; Fomina, E.; Kruus, M.; Sudnitson, A.; In: IEEE Region 8 EUROCON 2003. Computer as a Tool. Proceedings (Cat. No.03EX655). Piscataway, NJ, USA: IEEE, 2003. p. 57-61 vol.1. Conference Paper.

Low power synthesis based on information theoretic measures. Fomina, E.; Keevallik, A.; Sudnitson, A.; In: 2002 23rd International Conference on Microelectronics. Proceedings (Cat. No.02TH8595). Piscataway, NJ, USA: IEEE, 2002. p. 699-702 vol.2.

Web-based tools for finite state machine decomposition with analysis of information flows. Fomina, E.; Keevallik, A.; Kruus, A.; Sudnitson, A.; In: BEC 2002. Proceedings of the 8th Biennial Baltic Electronics Conference. Tallinn, Estonia: Tallinn Tech. Univ, 2002. p. 165-168.

viimati muudetud: 14.08.2005

Curriculum Vitae (CV)
1.First Name Jelena
2.Surname Fomina
3.Institution Taliin University of Technology (TUT)
4.Position Researcher
5.Date of birth 07.04.1974 (day.month.year)
6.Education 1999- TUT, PhD student
1196-1999 TUT, master of science
1991-1996 TUT, engineer
7.Research and
professional experience		 2005- researcher
8.Academic degree master of science
9.Dates and sites of
earning the degrees		 TUT, 1999
10.Honours/awards
11.Research-administrative
experience
12.Supervised dissertations
13.Current research program Synthesis of digital circuits, decomposition and encoding of Finite State Machines (FSM), entropy evaluations of partitions, quantitative estimation of feedback, low power realisation of FSM.
14.Current grant funding Estonian Science Foundation, Grant 5643.
15.List of most important publications

E. Fomina, R. Vassilyev and M.Brik, “New Approach to State Encoding of Low Power FSM”, in Proc. of the East West Design Test Workshop (IEEE EWDTW’05), Odessa, Ukraine, 2005, pp 21-26 (ISBN 966-659-113-8)

M. Brik, E. Fomina and R. Ubar, “A Proposal for Optimization of Low-Powered FSM Testing”, in Proc. of the East West Design Test Workshop (IEEE EWDTW’05), Odessa, Ukraine, 2005, pp 15-20, (ISBN 966-659-113-8).

A decomposition procedure for register-transfer level power management. Fomina, E.; Keevallik, A.; Kruus, M.; Sudnitson, A.; In: Proceedings of the International Conference on Computer Systems and Technologies (e-Learning). Sofia, Bulgaria: Bulgarian Acad. Sci, 2003. p. I.2-1-6.

Web-based system for sequential machines decomposition. Devadze, S.; Fomina, E.; Kruus, M.; Sudnitson, A.; In: IEEE Region 8 EUROCON 2003. Computer as a Tool. Proceedings (Cat. No.03EX655). Piscataway, NJ, USA: IEEE, 2003. p. 57-61 vol.1. Conference Paper.

Low power synthesis based on information theoretic measures. Fomina, E.; Keevallik, A.; Sudnitson, A.; In: 2002 23rd International Conference on Microelectronics. Proceedings (Cat. No.02TH8595). Piscataway, NJ, USA: IEEE, 2002. p. 699-702 vol.2.

Web-based tools for finite state machine decomposition with analysis of information flows. Fomina, E.; Keevallik, A.; Kruus, A.; Sudnitson, A.; In: BEC 2002. Proceedings of the 8th Biennial Baltic Electronics Conference. Tallinn, Estonia: Tallinn Tech. Univ, 2002. p. 165-168.

last updated: 14.08.2005

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