Gert Jervan

[ curriculum vitae ]

is involved in projects
no reg no project title, institution, position duration
1.ETF6717FPGA Based Environment for Design Validation
()		2006 - 2009
2.ETF6829Test and Fault Tolerance of Network-on-Chip Based Systems
(Tallinna Tehnikaülikooli Infotehnoloogia teaduskond)		2006 - 2009